The DAPDNA Dynamically Reconfigurable Processor combines the performance of hardware and flexibility of software.
The DAPDNA Dynamically Reconfigurable Processor developed by IPFlex Inc. provides “hardware performance” while maintaining “software flexibility.” The high-performance DAPDNA processor can change its hardware configuration in one clock cycle according to the application in demand. Multi-functional systems, or highly complicated algorithms traditionally requiring a few devices to process, are replaced with one DAPDNA dynamically reconfigurable processor.
The DAPDNA processor series is designed with DAPDNA-FW II Integrated Development Environment. DAPDNA-FW II provides compilers for algorithms written in C with data flow extension. A user can dramatically reduce system development cost with this platform.
DAPDNA：Digital Application Processor/Distributed Network Architecture |
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