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     Conference Information

Microprocessor Forum 2007    

Date: May 21-23, 2007
Place: 2050 Gateway Place, San Jose, CA 95110
Conference Date: May 23, 2007
Session Title: Video & Graphics Multicore Architectures
Speach Title: A Dual-Core Dynamically Reconfigurable Engine Employs 955 Parallel
                         Processing Elements
Presented by: Tomoyoshi Sato, Vice President & CTO, IPFlex Inc.

This presentation is the first disclosure of IPFlex’s dynamically reconfigurable processor targeted to provide high-performance programmable processing that is difficult to obtain via conventional ASICs. The presentation will provide detail on the engine’s processing capability plus application examples.

COOL Chips IX    ---Finished---
(IEEE Symposium on Low-Power and High-Speed Chips)
COOL Chips IX
(IEEE Symposium on Low-Power and High-Speed Chips)

Date: April 19-21, 2006
Place: Yokohama Joho Bunka Center, Yokohama, Japan
             (Yokohama Media & Communications Center, Yokohama, Japan)
Panel Discussion Date: April 21, 2006 15:45 - 17:15
Panel Discussion Title: "Is reconfigurable LSI going major?"
Moderator: Prof. Hideharu Amano (Keio University)

FPGA and its applications    ---Finished---

Date: Jan,17,2006 15:00-16:15
Place: Hiyoshi campus of Keio University
Chairman of the session: Tomoyoshi Sato(Vice President & CTO, IPFlex Inc.)

International Symposium on Advanced Reconfigurable Systems    ---Finished---
International Symposium on Advanced Reconfigurable Systems

Date: December,16,2005 11:05-11:45
Place: Kyoto Research Park
Invited Talk: Dynamic Reconfiguration and Its Granularity inside Future DAPDNA
                        Architecture
                        -- Application Examples and Performance Goals of DAPDNA-3A --
Speaker: Tomoyoshi Sato(Vice President & CTO, IPFlex Inc.)


The past Conference Information is here.
[2005] [2004] [2003]

 
 




 
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